﻿ Minimization using K-map Examples
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3 variable K-map, Example -4

Minimize following

F(x,y,z) =     (0,1,2,3,4,5,6,7)

Above is a common format of representing the K-map problems.

The numbers 0, 1, 2, 3, 4,   5, 6, 7 are the location of cells in the 3-var k-map table.

3 variable K– map with 1 and 0 values assigned to cells.

00

01

4

5

11

10

7

6

x’y’z’ = 1

x’y’z = 1

x’yz = 1

x’yz’ = 1

xy’z’ = 1

xy’z = 1

xyz = 1

xyz’ = 1

0

1

x

yz

Interview Questions. Main, FPGA, Digital Fundamentals
The K-map for 3 variables is plotted above. You will notice the column for 11 and 10 is inter-changed. This is done to allow only one variable to change across adjacent cells. This adjustment in columns allows in minimization of logic mapped into tables.

Any adjacent 1, 2, 4 or 8 cells can be grouped to find a minimized logic value. Following plot will show grouping of adjacent cells.
The two step minimization equation is shown below.
With reference to the table above the cells under the dotted box’s can be combined to come up with following reduced  equation.

00

01

4

5

11

10

7

6

x’y’z’ = 1

x’y’z = 1

x’yz = 1

x’yz’ = 1

xy’z’ = 1

xy’z = 1

xyz = 1

xyz’ = 1

0

1

x

yz

Resources

Clock Domain Crossing Discussion with
rtl & testbench example.

Rate change (asynchronous) FIFO design and fifo depth calculation.
FPGA Interview. FPGA flow.
x’y’z’
x’y’z
x’yz
x’yz’
xy’z’
xy’z
xyz
xyz’