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2’s complement:-

2’s complement of a binary number N is obtained by the formula

(2^n) – N

Where n is the no of bits in number N

Example:

Convert binary number 111001101 to 2’s complement

Method

2’s complement of a binary no can be obtained by two step process

Step 1

1’s complement of number N = 000110010

Step 2

1’s complement + 1

000110010

+ 000000001

= 000110011

Answer

2’s complement of a binary no 111001101 is 000110011

Trick : 2’s complement can be represented by keeping all lower significant bits till first 1 as it is and taking complement of all upper bits after that.

Some more examples for 2’s complement conversion.

1’s Complement Discussion.

Binary Number

2’s complement

1010101010

0101010110

1110011000

0001101000

11111000

00001000

2’s (Two’s) Complement Discussion.

1’s Complement discussion from here.

Resources

Digital design resources

Clock Domain Crossing Discussion with

rtl & testbench example.

Rate change(asynchronous) FIFO design and fifo depth calculation.

Half-adder , Full-adder , 4-bit binary adder , adder-subtractor circuit, overflow with rtl & testbench. Binary Multiplier, Parity error TT

Arithmetic, logical, shift micro-operations . Stack organization, LIFO, RPN discussion. VHDL rtl - Synchronous flip-flop , latch, shim to improve timing and counter example

RTL coding guidelines. ICG cell, Assertions, $assertkill, levels.

Digital design Interview questions.

FPGA Interview. FPGA flow.

Guide to Graduate studies in US

Pipeline vs. Parallel processing.

Digital design resources

Clock Domain Crossing Discussion with

rtl & testbench example.

Rate change(asynchronous) FIFO design and fifo depth calculation.

Half-

Digital design Interview questions.

FPGA Interview. FPGA flow.

Guide to Graduate studies in US

Pipeline vs. Parallel processing.

Digital Logic fundamentals topics @ fcd

Digital basics tutorial

Binary number discussion, 1 and 2 complement discussion,

Binary arithmetic, Signed Magnitude, overflow, examples

Gray coding, Binary coded digital (BCD) coding, BCD addition

Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates

Discussion of Boolean Algebra with examples.

Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples,

Boolean Functions,

Canonical and Standard Forms, Minterms and Maxterms

Sum of Minterms, Product of Maxterms or Canonical Forms,

Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s

Prime Implicant and Gate level minimization examples.

Digital basics tutorial

Binary number discussion, 1 and 2 complement discussion,

Binary arithmetic, Signed Magnitude, overflow, examples

Gray coding, Binary coded digital (BCD) coding, BCD addition

Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates

Discussion of Boolean Algebra with examples.

Duality Principle, Huntington Postulates, Theorems of Boolean Algebra -

Canonical and Standard Forms, Minterms and Maxterms

Sum of Minterms, Product of Maxterms or Canonical Forms,

Karnaugh map or K-

Prime Implicant and Gate level minimization examples.

LTE - Long Term Evolution topics from here

Solved Examples for 3 variable Kmaps

1. F(x,y,z) = (0,1,6,7) - Minimization, on this page.

2. F(x,y,z) = (0,1,4,5,6,7) - Minimization from here.

3. F(x,y,z) = (3,4,6,7) - Minimization from here.

4. F(x,y,z) = (0,1,2,3,4,5,6,7) - Minimization from here.

1. F(x,y,z) = (0,1,6,7) -

Universal NAND Gate.

Derive AND gate from NAND gate.

Derive OR gate from NAND gate

Derive XOR gate from NAND gate.

Derive AND gate from NAND gate.

Derive OR gate from NAND gate

Derive XOR gate from NAND gate.

Arithmetic, logical and shift microoperations.

Binary to Gray code conversion

Readmemh, Readmemb. Random numbers

Memory Implementation Sync Ram and Testbench

Binary to Gray code conversion

Readmemh, Readmemb. Random numbers

Memory Implementation Sync Ram and Testbench

LTE - Long Term Evolution topics from here