Static Timing Analysis
Setup time and hold time in digital circuits? Hint : Access from here False path in FPGA’s, Critical path, Negative slack, Jitter vs. clock skew. Routing delay, Flop to out delay, Flop to flop delay, Pad to flop delay, Board delay. Knowledge of Synthesis and layout constraints.
Digital Logic fundamentals topics @ fcd tutorial
Binary number discussion, 1 and 2 complement discussion, Binary arithmetic, Signed Magnitude, overflow, examples Gray coding, Binary coded digital (BCD) coding, BCD addition. Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates Discussion of Boolean Algebra with examples. Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms Sum of Minterms, Product of Maxterms or Canonical Forms, Karnaugh map or K-map discussion 2, 3, ,4 5 var’s Prime Implicant and Gate level minimization examples.
Tech in your Hand
Smart phone high tech hardware inside smart phones.
CPU, OS, RAM, Apps, Pixels, SD mem Cloud computing
4G UMTS LTE Tutorial
Long Term Evolution (LTE), data rates, Core Air and Radio networks, seamless mobility, Evolved Packet core (EPC), SAE etc. Mobility Management Entity (MME), Serving Gateway SGW. Packet Data Network (PDN) SAE Gateway Enhanced Packet Data Gateway (ePDG)
More LTE - Long Term Evolution topics from here