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Parity Generation and Checking

In digital communications, a large amount of data is transmitted and received across various mediums. Mostly during the transfers some noise gets added to the data and makes it difficult to recover signal.

To Make the data recovery easier an extra bit is appended to the binary (0,1) message to make the ‘logic 1’ count even or odd. This extra bit is known as parity bit and used for error detection.

To Make the data recovery easier an extra bit is appended to the binary (0,1) message to make the ‘logic 1’ count even or odd. This extra bit is known as parity bit and used for error detection.

The block diagram implementation of generator and checker shows that the circuit requires 2 XOR gates at the parity generation side of transmitter and 3 XOR gates at the receiver side of parity checker.

Discussion of parity generation and checker circuit below

Resources

Digital Design Topics Half-adder , full-adder , Adder-sub tractor

Stack Organization - LIFO, RPN

Binary multiplier circuit.

CMOS introduction

Digital fundamentals -

RTL coding guidelines. ICG cell, Assertions, levels. Chandle

Pipeline vs. Parallel processing.

Digital Design Topics Half-

Stack Organization -

Binary multiplier circuit.

CMOS introduction

Digital fundamentals -

RTL coding guidelines. ICG cell, Assertions, levels. Chandle

Pipeline vs. Parallel processing.

Digital Logic fundamentals topics @ fcd

Digital basics tutorial

Binary number discussion, 1 and 2 complement discussion,

Binary arithmetic, Signed Magnitude, overflow, examples

Gray coding, Binary coded digital (BCD) coding, BCD addition

Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates

Discussion of Boolean Algebra with examples.

Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms Sum of Minterms, Product of Maxterms or Canonical Forms,

Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s

Digital basics tutorial

Binary number discussion, 1 and 2 complement discussion,

Binary arithmetic, Signed Magnitude, overflow, examples

Gray coding, Binary coded digital (BCD) coding, BCD addition

Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates

Discussion of Boolean Algebra with examples.

Duality Principle, Huntington Postulates, Theorems of Boolean Algebra -

Introduction to Verilog RTL

Verilog Operators.

Initial Statements in verilog.

Clock and Reset generation.

Blocking vs. Non-blocking Statements.

Conditional Statements & ‘always’ block.

Counter Implementation.

File Operations - $fopen, $fclose, $fdisplay, $fscanf

Read binary or hex format files - $readmemh, $readmemb.

Verilog Operators.

Initial Statements in verilog.

Clock and Reset generation.

Blocking vs. Non-

Conditional Statements & ‘always’ block.

Counter Implementation.

File Operations -

Read binary or hex format files -

Parity systems are implemented on both transmitters and receivers. The transmitter is responsible for generating the parity bit. The receiver is responsible for detecting the message including the parity bit. If message doesn’t meet the parity check an error flag is generated and transmitter is requested to re-transmit the packet.

Cloud Computing ?

Whenever a document or photo is uploaded on the web, a thread of cloud computing is active. Learn more from here.

Whenever a document or photo is uploaded on the web, a thread of cloud computing is active. Learn more from here.

Arithmetic, logical, shift micro-operations , Overflow conditions.

LTE - Long Term Evolution topics from here